E32E RISC-V System Revisited

During my short break I decided to work on the existing E32E device and change it to be a bit more like a mini gaming machine.
To that end, I’ve revised it to match the following layout:

• One main core with a dedicated FPU (Zicsrimf)
• Two helper cores (Zicsrim)
• One GPU with user-controlled framebuffer mapping

The current ROM and samples, alongside with a doom port can be found here: ecilasun/riscvtool

The hardware implementation with the most recent ROM (written mostly in systemverilog) can be found here: ecilasun/e32e

The GPU

This time around the GPU is a bit more like the CPUs on the device and has its own direct access to the AXI4 bus. The arbiter will give the GPU some time slice during which it can do a 20x burst read (128 bits each) to read the scan-out memory. It also allows the CPU to control it via a command fifo, where one can:

• Set a memory address for scan-out (128bit aligned)
• Turn the video output on-off (to be used when all bandwidth is required by the CPU)
• Set palette entries for the 8bit indexed mode

Future extensions will add more features as needed, the most interesting one being polygon rasterization.

The CPU

Nothing much interesting on this end, each core is clocked at 100MHz and have an average memory access rate of about 17MBytes/sec which is more than enough to run DOOM at a very decent frame rate with default settings.

The most interesting part is the mailbox between the CPUs where one can kick an IRQ to be handled by a remote processor, allowing for some sort of task control. This can for example be used by some audio code which runs on one processor to produce music/sfx while the game runs on another core, or to use a remote CPU as a smart DMA. That’s all up to the user, of course.

The OS

There is not much of an OS to speak of, but there is one being developed to act as a basic system provider for any user programs that wish to access the file system or the keyboard.